The Macau section of the two-day “2025 RISC-V Industry Development Conference and RDSA International Summit”, including the “Global Cooperation Special Forum”, which was only held locally, was held at The Parisian resort in Cotai yesterday.
The first day of the event took place in Zhuhai on Monday, when the event’s opening ceremony and Main Forum were held.
The forum was hosted by RISC-V ECOSYSTEM & INDUSTRY COMMITTEE, RDSA INDUSTRY ALLIANCE, RISC-V Open-Source Ecosystem Development Centre in the Guangdong-Hong Kong-Macao Greater Bay Area, and the MACAU INSTITUTE OF INDUSTRIAL TECHNOLOGY.
The theme of the conference was “Accelerating Standardisation, Facilitating Connection”.
According to a statement by the organisers, the local forum adopted a dual-city collaboration model, spanning two consecutive days with sessions held in both Zhuhai and Macau. It aimed to promote international cooperation and facilitate city-level strategic agreements. During the forum, an unveiling ceremony was launched for the RISC-V Open-Source Ecosystem Development Centre’s DSA Development Laboratory.
Opportunities and Strategies for RISC-V in the AI Era
Alibaba DAMO Academy Chief Scientist and Zhihe Computing CEO Meng Jianyi explained what RISC-V* is at the forum.
According to Meng, RISC-V is an open-source instruction set architecture (ISA) natively designed for the AI era. Unlike traditional closed architectures, its high scalability enables flexible adaptation to various AI algorithms and hardware implementations—from general-purpose CPUs and dedicated accelerators to in-memory computing, Meng said.
Meng pointed out that by advancing multiple technical pathways and actively building an open-source software ecosystem and industry standards, RISC-V could overcome computational and energy efficiency bottlenecks in the rapidly evolving AI market, positioning itself as a foundational pillar for future computing.
Economic and Technological Development Bureau (DSEDT) Director Yau Yun Wah said in his speech that the open, modular, and highly scalable architecture of RISC-V is reshaping the global semiconductor ecosystem.
He emphasised that Macau is actively integrating itself into the national development strategy and will fully leverage its advantages as an international platform to participate in the construction of global RISC-V standards.
He also said that Macau aims to promote the integration of industry, academia, and research, contributing to the development of an open and collaborative global RISC-V ecosystem.
Zhang Hongtu, chairman of the China Electronics Standardisation Association (CESA), highlighted three key points in his address, upholding open sharing of technology and knowledge to preserve the open-source nature of RISC-V; strengthening RISC-V standards and global collaboration to establish a fair and transparent international standards framework; deepening market-orientated application alignment, expanding into critical fields such as AI and smart manufacturing.
He emphasised that Macau, as a bridge between China and the rest of the world, can play a unique pivotal role in fostering international cooperation.
* RISC-V stands for “Reduced Instruction Set Computing – Five”. It’s an open-source hardware instruction set architecture (ISA) based on the principles of reduced instruction set computing (RISC). RISC-V is designed to be simple, efficient, and extensible, making it suitable for a wide range of computing applications, from embedded systems to high-performance computing. – Poe
Economic & Technological Development Bureau (DSEDT) Director Yau Yun Wah addresses yesterday’s forum at the Parisian.
China Electronics Standardisation Association (CESA) Chairman Zhang Hongtu addresses yesterday’s forum. – Photos: Armindo Neves
